Altera Quartus II Settings File - Manual (Page 738)

STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET
Allows the compiler to enable netlist placements and routing where the dedicated reference clock pad in a
Quad, that has a GXB Transmitter PLL with its pll_reset or pllenable signal connected or has only
Receivers which have their rxanalogreset signals connected, to feed other Quads or core logic. Also allows
the compiler to enable netlist placements where a GXB Transmitter PLL exists in a Quad that has only
Receivers which have their rxanalogreset signals connected.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
None
Syntax
set_global_assignment -name STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET
<value>
Default Value
Off
738 STRATIXGX_ALLOW_CLOCK_FANOUT_WITH_ANALOG_RESET
MNL-Q21005
2015.05.04
Altera Corporation Quartus Settings File Reference Manual
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