Altera Quartus II Settings File - Manual (Page 697)

PRESERVE_PLL_COUNTER_ORDER
Preserves the order of PLL clock outputs used when selecting corresponding output counters. For
example, a clk0 output will use a C0 counter and a clk2 output will use a C2 counter. Turning this option
can cause clock routing problems, as the clock router cannot rotate counters to resolve conflicts.
Type
Boolean
Device Support
This setting can be used in projects targeting any Altera device family.
Notes
This assignment supports Fitter wildcards.
Syntax
set_instance_assignment -name PRESERVE_PLL_COUNTER_ORDER -to <to> -entity
<entity name> <value>
MNL-Q21005
2015.05.04
PRESERVE_PLL_COUNTER_ORDER 697
Quartus Settings File Reference Manual Altera Corporation
Send Feedback