Reserve_other_ap_pins_after_configuration – Altera Quartus II Settings File User Manual

Page 724

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RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION

Specifies how the Data[15..8], PADD[23..0], NRESET, NAVD, NOE and NWE pins should be used when

the device is operating in user mode after configuration is complete. Depending on the current device and

configuration scheme, these pins can be reserved as regular I/O pins, as inputs that are tri-stated, as

outputs that drive ground, as outputs that drive an unspecified signal, or compiler configured. If these

pins are reserved as regular I/O pins, they can be used as ordinary I/O pins after configuration. If these

pins are only used to interface with external memory for configuration, these pins should be reserved as

compiler configured.

Old Name

RESERVE_OTHER_APF_PINS_AFTER_CONFIGURATION

Type

Enumeration

Values

• As input tri-stated

• As output driving an unspecified signal

• As output driving ground

• Compiler configured

• Use as regular IO

Device Support

This setting can be used in projects targeting any Altera device family.

Notes

None

Syntax

set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION
<value>

Default Value

Use as regular IO

Example

set_global_assignment -name RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION "USE
AS REGULAR IO"

724

RESERVE_OTHER_AP_PINS_AFTER_CONFIGURATION

MNL-Q21005

2015.05.04

Altera Corporation

Quartus Settings File Reference Manual

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