3 lcd screen width register, Lcd screen width register -11, Table 8-3 – Motorola MC68VZ328 User Manual

Page 139: Table 8-4, Lcd screen width register description -11, 2 lcd virtual page width register, Lvpw lcd virtual page width register 0x(ff)fffa05, Lxmax lcd screen width register 0x(ff)fffa08

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Programming Model

LCD Controller

8-11

8.3.2

LCD Virtual Page Width Register

The LCD virtual page width (LVPW) register contains the width of the displayed image. The bit
assignments for the register are shown in the following register display. The settings for the bits in the
register are listed in Table 8-3.

LVPW

LCD Virtual Page Width Register

0x(FF)FFFA05

8.3.3

LCD Screen Width Register

The LCD screen width register (LXMAX) is used to specify the width of the LCD panel’s screen in pixels.
This register must be a multiple of 16. The bit assignments for the register are shown in the following
register display. The settings for the bits in the register are listed in Table 8-4.

LXMAX

LCD Screen Width Register

0x(FF)FFFA08

BIT 7

6

5

4

3

2

1

BIT 0

VP8

VP7

VP6

VP5

VP4

VP3

VP2

VP1

TYPE

rw

rw

rw

rw

rw

rw

rw

rw

RESET

1

1

1

1

1

1

1

1

0xFF

Table 8-3. LCD Virtual Page Width Register Description

Name

Description

Setting

VPx
Bits 7–0

Virtual Page Width 8–1—These bits specify the virtual page width of the LCD panel
in terms of word count. The virtual page width is the virtual width in pixels divided by
16 for a black-and-white display, by 8 for a 4-grayscale display, and by 4 for a
16-grayscale display.

See descrip-
tion

BIT 15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

BIT 0

XM9

XM8

XM7

XM6

XM5

XM4

TYPE

rw

rw

rw

rw

rw

rw

RESET

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0x03F0

Table 8-4. LCD Screen Width Register Description

Name

Description

Setting

Reserved
Bits 15–10

Reserved

These bits are reserved and
should be set to 0.

XMx
Bits 9–4

Maximum Width 9–4—These bits represent the width of the LCD
panel in the number of pixels.

See description.

Reserved
Bits 3–0

Reserved

These bits are reserved and
should be set to 0.

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