Motorola MC68VZ328 - Manual (Page 369)

Index Index-xi
PGSZ field, 7-14
PHA bit
SPICONT1 register, 13-7
SPICONT2 register, 13-16
Phase bit, see PHA bit
Phase-locked loop, see PLLCLK output frequency
PIN bit, 15-9
Pin status indicator bit, see PIN bit
Pixel clock divider 5–0 field, see PCDx field
Pixel offset code field, see POSx field
Pixel polarity bit, see PIXPOL bit
PIXPOL bit, 8-16
PJDATA register, 10-32
PJDIR register, 10-31
PJPUEN register, 10-33
PJSEL register, 10-33
PKDATA register, 10-35
PKDIR register, 10-34
PKPUEN register, 10-36
PKSEL register, 10-36
PLL control register, see PLLCR register
PLL frequency select register, see PLLFSR register
PLL module, see clock generation module
PLLCLK
frequency selection, 4-6
initial power-up sequence, 4-5
output frequency, selecting, 4-3
PLLCR register, 4-8
PLLFSR register, 4-10
PMDATA register, 10-38
PMDIR register, 10-37
PMPUEN register, 10-39
PMSEL register, 10-40
POL bit
PWMC1 register, 15-9
SPICONT1 register, 13-7
SPICONT2 register, 13-16
POL1 bit, 9-8
POL2 bit, 9-8
POL3 bit, 9-8
POL5 bit, 9-9
POL6 bit, 9-8
Polarity bit, see POL bit
Polarity control 1 bit, see POL1 bit
Polarity control 2 bit, see POL2 bit
Polarity control 3 bit, see POL3 bit
Polarity control 5 bit, see POL5 bit
Polarity control 6 bit, see POL6 bit
Polarity field, see POLx field
POLx field, 10-19
Port A
introduction, 10-6
registers
data register, see PADATA register
direction register , see PADIR register
pull-up enable register , see PAPUEN register
register summary, 10-6
Port B
bit 6, see TOUT/TIN/PB6 pin
bit 7, see PWMO1/PB7 pin
dedicated I/O functions, 10-9 to 10-10
registers
data register , see PBDATA register
direction register , see PBDIR register
pull-up enable register , see PBPUEN register
register summary, 10-8
select register , see PBSEL register
Port C
bit 4, see LFLM/PC4 pin
bit 5, see LLP/PC5 pin
bit 7, see LACD/PC7 pin
bits 3–0, see LD[3:0]/PC[3:0], LD[7:4]/PK[7:4]
pins
dedicated I/O functions, 10-12
registers
data register , see PCDATA register
direction register , see PCDIR register
pull-down enable register , see PCPDEN
register
register summary, 10-11
select register, see PCSEL register
Port D
bits 7–0, see IRQ6/PD[7:0] pin
dedicated I/O functions, 10-17
interrupts
interrupt handling, overview, 10-1
interrupt options, 10-18
interrupt port operation, 10-15
masking interrupt bits, 10-18
using interrupts for system wake up, 10-18
keyboard applications, 10-18
registers
data register, see PDDATA register
direction register, see PDDIR register
interrupt request edge register, see PDIRQEG
register
interrupt request enable register, see
PDIRQEN register
keyboard enable register, see PDKBEN
register
polarity register, see PDPOL register
pull-up enable register, see PDPUEN register
register summary, 10-16
select register , see PDSEL register
Port E
bit 0, see SPITXD/PE0 pin
bit 1, see SPIRXD/PE1 pin
bit 2, see SPICLK2/PE2 pin