Motorola MC68VZ328 - Manual (Page 337)

AC Electrical Characteristics
Electrical Characteristics 19-21
19.3.16 Page-Hit CPU Read Cycle for 8-Bit SDRAM (CAS
Latency = 1)
Figure 19-17 shows the timing diagram for the page-hit CPU read cycle for 8-bit SDRAM. The signal
values and units of measure for this figure are found in Table 19-16 on page 19-31. Detailed information
about the operation of individual signals can be found in both Chapter 8, “LCD Controller,” and Chapter 7,
“DRAM Controller.”
Figure 19-17. Page-Hit CPU Read Cycle for 8-Bit SDRAM Timing Diagram
S0 S2 S4 S4 S4 S5 S4 S4 S3 S1
SDCLK
RAS
SCKEN
D[15:0]
CAS
A[16:1]/MD[15:0]
SDA10
CS
WE
DQM
DTACK
Read
Command
Col
Upper Byte Lower Byte
S6 S7