Chapter1 introduction, Chapter 1, Chapter 1 introduction – Motorola MC68VZ328 User Manual
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Introduction
1-1
Chapter 1
Introduction
This chapter describes the overall system architecture of the MC68VZ328 (DragonBall™ VZ) integrated
processor. It provides an overview of the 68000 CPU and the operational blocks of the MC68VZ328 at a
system level.
The MC68VZ328 builds on the success of the earlier DragonBall processors and features a synthesizable
68000 core that utilizes an advanced process technology. Thus, the DragonBall VZ can provide system
designers with more performance—the capability of running at higher speed while achieving lower power
consumption using a true static core. Additionally, the new DragonBall VZ integrates the logic needed to
support color LCD panels on-chip. The DragonBall VZ is the integrated processor of choice for some of
the most popular PDA designs, and it can be used in a wide variety of other applications including exercise
monitors, games, smart toys, depth finders, navigation systems, and smart phones.
All these features combine to make the MC68VZ328 microprocessor attractive to many system designers.
Its functionality and glue logic are all optimally connected and timed with the same clock. Also, only the
essential signals are brought out to the pins, allowing the MC68VZ328’s primary packages (TQFP and
MAPBGA) to occupy the smallest possible footprint on the circuit board.
To improve total system throughput and reduce component count, board size, and the cost of system
implementation, the MC68VZ328 combines a powerful FLX68000 processor with intelligent peripheral
modules and typical system interface logic. The architecture of the MC68VZ328, shown in Figure 1-1 on
page 1-2, consists of the following blocks:
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FLX68000 CPU
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Chip-select logic and 8-/16-bit bus interface
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Clock generation module (CGM) and power control
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Interrupt controller
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76 GPIO lines grouped into 10 ports
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Two pulse-width modulators (PWM 1 and PWM 2)
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Two general-purpose timers
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Two serial peripheral interfaces (SPI 1 and SPI 2)
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Two UARTs (UART 1 and UART 2) and infrared communication support
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LCD controller
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Real-time clock
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DRAM controller that supports EDO RAM, Fast Page Mode, and SDRAM
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In-circuit emulation module
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Bootstrap mode