Motorola MC68VZ328 - Manual (Page 34)

1-4 MC68VZ328 User’s Manual
CPU
• Built-in emulation function
— Dedicated memory space for emulator debug monitor with chip-select
— Dedicated interrupt (interrupt level 7) for in-circuit emulation (ICE)
— One address-signal comparator and one control-signal comparator, with masking to support
single or multiple hardware execution
— Breakpoint
— One breakpoint instruction insertion unit
• Bootstrap mode function
— Capability to initialize system and download programs and data to system memory through
UART
— Acceptance of execution command to run program stored in system memory
— 8-byte-long instruction buffer for 68000 instruction storage and execution
• Power management
— Fully static HCMOS technology
— Programmable clock synthesizer using 32.768 kHz or 38.4 kHz external crystal for full
frequency control
— Low-power stop capabilities
— Modules that can be individually shut down
— Operation from DC to 33 MHz (processor clock)
— Operating voltage of 2.7 V to 3.3 V
— Compact 144-lead thin quad flat pack (TQFP) and MAPBGA
1.2 CPU
The FLX68000 CPU in the MC68VZ328 is an updated implementation of the 68000 32-bit microprocessor
architecture. The main features of the CPU are the following:
• Low-power, fully static HCMOS implementation
• 32-bit address bus and 16-bit data bus
• Sixteen 32-bit data and address registers
• 56 powerful instruction types that support high-level development languages
• 14 addressing modes and 5 main data types
• Seven priority levels for interrupt control
The CPU is completely code compatible with other members of the M68000 families, which means it has
access to a broad base of established real-time kernels, operating systems, languages, applications, and
development tools.