Motorola MC68VZ328 - Manual (Page 196)

10-26 MC68VZ328 User’s Manual
Programming Model
10.4.7.3 Port F Dedicated I/O Functions
The eight PFDATA lines are multiplexed with the dedicated I/O signals whose assignments are shown in
Table 10-33.
The LCONTRAST function controls the pulse-width modulator (PWM) inside the LCD controller to
adjust the supply voltage to the LCD panel. Bit 1 can be programmed as IRQ5, an external level 5
interrupt.
The CLKO output clock signal is internally connected to the SYSCLK clock output of the internal CGM.
This signal is provided for external reference. The output can be disabled to reduce power consumption
and electromagnetic emission. This signal defaults to a PF2 input signal. See Section 4.2, “CGM
Operational Overview,” on page 4-3 for more information about this signal.
Bit 7 is used for the chip-select signal CSA1. See Section 6.2, “Chip-Select Operation,” on page 6-2 for
detailed information.
Table 10-33. Port F Dedicated I/O Function Assignments
Bit GPIO Function Dedicated I/O Function
0 Data bit 0 LCONTRAST
1 Data bit 1 IRQ5
2 Data bit 2 CLKO
3 Data bit 3 A20
4 Data bit 4 A21
5 Data bit 5 A22
6 Data bit 6 A23
7 Data bit 7 CSA1