Motorola MC68VZ328 - Manual (Page 90)

6-2 MC68VZ328 User’s Manual
Chip-Select Operation
The basic chip-select model allows the chip-select output signal to assert in response to an address match.
The signals are asserted externally shortly after the internal Address Strobe (AS) signal goes low. The
address match is described in terms of a group base address register and a chip-select register. The memory
size of the chip-select can be selected from a set of predefined ranges (32K, 64K, 128K, 256K, 512K,
1 Mbyte, 2 Mbyte, 4 Mbyte, 8 Mbyte, or 16 Mbyte). These memory ranges represent the most popular
memory sizes available on the market and apply to the registers CSB, CSC, and CSD. The CSA register
primarily supports ROM, which is usually 128K to 16 Mbyte. Using this scheme, it is easy to design
software without the necessity of programming a chip-select mask register.
The chip-select can be programmed to allow read-only or read/write accesses. Other parameters that can be
programmed include the number of wait states (from 0 to 13), data bus size selection, and whether a
DTACK signal is automatically generated for the chip-select logic.
6.2 Chip-Select Operation
A chip-select output signal is asserted when an address is matched and after the AS signal goes low. The
base address and address mask registers are used in the compare logic to generate an address match. The
byte size of the matching block must be a power of two and the base address must be an integer multiple of
this size. Therefore, an 8K block size must begin on an 8K boundary, and a 64K block size can only begin
on a 64K boundary. Each chip-select is programmable, and the registers have read/write capability so that
the programmed values can be read back.
NOTE:
The chip-select logic does not allow an address match during interrupt
acknowledge (Function Code 7) cycles.
6.2.1 Memory Protection
The chip-select range of the four chip-selects can be programmed as read-only or read/write. Chip-selects
that control the crucial system data are usually programmed as supervisor-only and read-only so they can
be protected from system misuse (for example, a low battery). However, a certain area of this
Table 6-1. Chip-Select and Memory Types
Chip-Select Signal Memory Supported
CSA0 ROM, SRAM, flash memory chip
CSA1 ROM, SRAM, flash memory chip
CSB0 ROM, SRAM, flash memory chip
CSB1 ROM, SRAM, flash memory chip
CSC0/RAS0 DRAM, ROM, SRAM, flash memory chip-select
CSC1/RAS1 DRAM, ROM, SRAM, flash memory chip-select
CSD0/CAS0 DRAM, ROM, SRAM, flash memory chip-select
CSD1/CAS1 DRAM, ROM, SRAM, flash memory chip-select