Motorola MC68VZ328 - Manual (Page 279)

Programming Model
Universal Asynchronous Receiver/Transmitter 1 and 2 14-27
RTS2
CONT
Bit 7 RTS2 Control—This bit selects the function of the RTS2 pin. 0 = RTS2 pin is controlled by the
RTS2 bit.
1 = RTS2 pin is controlled by the
receiver FIFO. When no more
than four slots are available,
RTS2 is negated.
RTS2
Bit 6 Request to Send Pin—This bit controls the RTS2 pin when
the RTS2 CONT bit is 0. 0 = RTS2 pin is 1.
1 = RTS2 pin is 0.
IRDAEN
Bit 5 Infrared Enable—This bit enables the IrDA interface. 0 = Normal NRZ operation.
1 = IrDA operation.
IRDA
LOOP
Bit 4 Loop Infrared—This bit controls the loopback from the trans-
mitter to the receiver in the IrDA interface. This bit is used for
system testing purposes. 0 = No infrared loop.
1 = Connect the infrared transmitter
to an infrared receiver.
RXPOL
Bit 3 Receive Polarity—This bit controls the polarity of the received
data. 0 = Normal polarity (1 = idle).
1 = Inverted polarity (0 = idle).
TXPOL
Bit 2 Transmit Polarity—This bit controls the polarity of the trans-
mitted data. 0 = Normal polarity (1 = idle).
1 = Inverted polarity (0 = idle).
Reserved
Bits 1–0 Reserved These bits are reserved and should
be set to 0.
Table 14-14. UART 2 Miscellaneous Register Description (Continued)
Name Description Setting