Motorola MC68VZ328 - Manual (Page 69)

Clock Generation Module and Power Control Module 4-1
Chapter 4
Clock Generation Module and Power
Control Module
This chapter describes the clock generation module (CGM) and power control module (PCM). The
description of both modules comprises a single chapter because their operation is so closely integrated.
The programmability of the individual clock signals makes the CGM a flexible clock source for the
MC68VZ328 and its associated peripherals.
The CGM uses a low-frequency oscillator in conjunction with a multiplier/divider chain to produce the
clock signals used throughout the MC68VZ328 integrated processor. The frequency of all clock signals
(except the low-frequency reference) are individually selectable through software control. The
MC68VZ328 has four different power modes to provide optimum power efficiency.
The PCM controls the power consumption of the CPU by applying clock signals to the CPU at reduced
burst widths. For maximum power savings, the MC68VZ328 can be placed in sleep mode in which all
clocks (except for the low-frequency clock) are disabled.
NOTE:
The CGM module is designated as the PLL module in earlier versions of
the DragonBall family. The nomenclature changed from PLL to CGM to
be consistent with Motorola naming and standards conventions. The term
PLL is used only to describe the actual PLL circuit within the CGM.