Motorola MC68VZ328 - Manual (Page 97)

Programming Model
Chip-Select Logic 6-9
SIZ
Bits 3–1 Chip-Select Size—This field determines the
memory range of the chip-select. For CSAx
and CSBx, the chip-select size is between
128K and 16 Mbyte. For CSCx and CSDx, the
chip-select size is between 32K and 16 Mbyte. 000 = 128K (32K or 8 Mbyte* for CSCx and CSDx).
001 = 256K (64K or 16 Mbyte* for CSCx and CSDx).
010 = 512K (128K for CSCx and CSDx).
011 = 1 Mbyte (256K for CSCx and CSDx).
100 = 2 Mbyte (512K for CSCx and CSDx).
101 = 4 Mbyte (1 Mbyte for CSCx and CSDx).
110 = 8 Mbyte (2 Mbyte for CSCx and CSDx).
111 = 16 Mbyte (4 Mbyte for CSCx and CSDx).
* Note: Large DRAM size selection requires the
DSIZ3 bit in the chip-select control register to be set.
EN
Bit 0 Chip-Select Enable—This write-only bit
enables each chip-select. 0 = Disabled.
1 = Enabled.
Table 6-7. Chip-Select Register A Description (Continued)
Name Description Setting