Motorola MC68VZ328 - Manual (Page 40)

1-10 MC68VZ328 User’s Manual
Modules of the MC68VZ328
1.3.8 General-Purpose I/O (GPIO) Lines
The MC68VZ328 supports a maximum of 76 GPIO lines grouped together in ports A–G, J, K, and M.
These ports can be configured as GPIO pins or dedicated peripheral interface pins. Each pin can be
independently programmed as a GPIO pin even when other pins related to that on-chip peripheral are used
as dedicated pins. For detailed information about programming these GPIO lines, see Chapter 10, “I/O
Ports.”
1.3.9 Real-Time Clock
A real-time clock provides the time of day with 1-second resolution. Using an external crystal (either
32.768 kHz or 38.4 kHz) as a clock source, it keeps time as long as power is applied to the chip, even when
it is in sleep or doze mode. The watchdog clock timer protects against system failures by providing a way
of escape from unexpected input conditions, external events, or programming errors. Once started, this
timer must be cleared by software on a regular basis so that it never reaches its time-out value. When it
does reach its time-out value, the watchdog timer assumes that a system failure has occurred and the
software watchdog logic resets or interrupts the CPU. For detailed information about configuring and
programming this module, refer to Chapter 11, “Real-Time Clock.”
1.3.10 General-Purpose Timer
The MC68VZ328 has two 16-bit timers that can be used in various modes to capture the timer value with
an external event, to trigger an external event or interrupt when the timer reaches a set value, or to count
external events. Each timer has an 8-bit prescaler to allow a programmable clock input frequency to be
derived from the system clock. The two timers can also be cascaded together as one 32-bit timer. This
module is described in detail in Chapter 12, “General-Purpose Timers.”
1.3.11 Serial Peripheral Interfaces (SPI)
The MC68VZ328 contains two serial peripheral interface (SPI) modules, SPI 1 and SPI 2. The serial
peripheral interfaces are mainly used for controlling external peripherals. The passed data is synchronized
with the SPI clock, and it is transmitted and received with the same SPI clock. One SPI module (SPI 2)
only operates in master mode, which initiates SPI transfers from the MC68VZ328 to the peripheral. The
other SPI (SPI 1) may be configured as either master or slave. Chapter 13, “Serial Peripheral Interface 1
and 2,” provides detailed information about the configuration and operation of the SPIs.
1.3.12 Universal Asynchronous Receiver/Transmitter (UART)
Modules
The two UART ports in the MC68VZ328 may be used to communicate with external serial devices.
UART 1 is identical to the UART in the DragonBall EZ processor, while UART 2 represents an enhanced
version of UART 1. One of the enhancements to the UART 2 design consists of an enlarged RxFIFO and
TxFIFO to reduce the number of software interrupts. An improvement to both UARTs is the system clock
input frequency, which is 33.16 MHz, doubling the 16.58 MHz frequency of the MC68EZ328. For a
33.16 MHz system clock, software written for the MC68EZ328 version of the chip is not compatible
unless the divider and prescaler are adjusted to compensate for the increased clock speed. For more
information about the programming and configuration of these two modules, see Chapter 14, “Universal
Asynchronous Receiver/Transmitter 1 and 2.”