Motorola MC68VZ328 User Manual

Page 339

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AC Electrical Characteristics

Electrical Characteristics

19-23

19.3.18

Page-Hit SDRAM CPU Write Cycle (CAS Latency = 1)

Figure 19-19 shows the timing diagram for the page-hit SDRAM CPU write cycle for 8-bit SDRAM. The
signal values and units of measure for this figure are found in Table 19-16 on page 19-31. Detailed
information about the operation of individual signals can be found in both Chapter 8, “LCD Controller,”
and Chapter 7, “DRAM Controller.”

Figure 19-19. Page-Hit SDRAM CPU Write Cycle Timing Diagram

S0

S2

S4

S6

S7

S5

S3

S1

SDCLK

RAS

SCKEN

D[15:0]

CAS

A[16:1]/MD[15:0]

SDA10

CS

WE

DQM

DTACK

Write

Command

Col

10

14

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