Motorola MC68VZ328 - Manual (Page 365)

Index Index-vii
ICEMCR register, 16-8
ICEMSR register, 16-10
ICR register, 9-8
Ignore CTS1 (Tx control) bit, see NOCTS1 bit
Ignore CTS2 (Tx control) bit, see NOCTS2 bit
ILCR register, 9-19
IMR register, 9-10
In-circuit emulation module, see ICE module
Infrared enable bit, see IRDAEN bit
Infrared testing bit see IRTEST bit
Infrared, see IrDA
INT[3:0] pins, 2-6
INT0 bit
IPR register, 9-18
ISR register, 9-14
INT1 bit
IPR register, 9-18
ISR register, 9-14
INT2 bit
IPR register, 9-18
ISR register, 9-14
INT3 bit
IPR register, 9-17
ISR register, 9-14
Interrupt control register , see ICR register
Interrupt controller
interrupts
keyboard, 9-20
pen, 9-20
processing of, 9-2
introduction, 9-1
operation, 9-5
priority processing, 9-5
programming model, 9-7 to 9-19
signals
emulator interrupt status, see EMIQ signal pin
interrupt bits 3–0, see INT[3:0] pins
interrupt request 5, see IRQ5/PF1 pin
interrupt request bits 3–1, see IRQ[3:1] pins
introduction, 2-6
Port F bit 1, see IRQ5/PF1 pin
vectors
exception, 9-3
generation of, 9-6
interrupt, 9-6
Interrupt enable bit, see IRQEN bit
Interrupt enable field, see IQENx field
Interrupt level register, see ILCR register
Interrupt mask register, see IMR register
Interrupt pending register , see IPR register
Interrupt priority mask, 9-4
Interrupt request bit, see IRQ bit
Interrupt request enable bit, see IRQEN bit
Interrupt request level 1 bit, see IRQ1 bit
Interrupt request level 2 bit, see IRQ2 bit
Interrupt request level 3 bit, see IRQ3 bit
Interrupt request level 5 bit, see IRQ5 bit
Interrupt request level 6 bit, see IRQ6 bit
Interrupt service routine, programming
considerations, 9-5
Interrupt sources, control bits, 9-10
Interrupt vector register, see IVR register
Interrupts, external as edge triggered, 9-12
Introduction to MC68VZ328
bootstrap mode, 1-11
chip-select logic, 1-9
clock generation and power control modules, 1-8
component modules, 1-1
CPU, 1-4
DRAM controller, 1-9
in-circuit emulation module, 1-11
memory controller, 1-8
PWM modules, 1-11
real-time clock, 1-10
system control logic, 1-9
IPR register, 9-16
IQEGx field, 10-21
IQENx field, 10-20
IRDA LOOP bit
UMISC1 register, 14-17
UMISC2 register, 14-27
IrDA, definition, 14-3
IRDAEN bit
UMISC1 register, 14-17
UMISC2 register, 14-27
IRQ bit
PWMC1 register, 15-4
SPICONT2 register, 13-15
IRQ[3:1] pins, 2-6
IRQ1 edge trigger select bit, see ET1 bit
IRQ1 bit
IPR register, 9-17
ISR register, 9-13
IRQ2 edge trigger select bit, see ET2 bit
IRQ2 bit
IPR register, 9-17
ISR register, 9-13
IRQ3 edge trigger select bit, see ET3 bit
IRQ3 bit
IPR register, 9-17
ISR register, 9-13
IRQ5 bit
IPR register, 9-17
ISR register, 9-13
IRQ5/PF1 pin, 2-7
IRQ6 edge trigger select bit, see ET6 bit
IRQ6 bit
IPR register, 9-17