Table 6-3, Table 6-4 – Motorola MC68VZ328 User Manual
Page 93
Programming Model
Chip-Select Logic
6-5
CSGBB
Chip-Select Group B Base Address Register
0x(FF)FFF102
CSGBC
Chip-Select Group C Base Address Register
0x(FF)FFF104
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BIT
0
GB
B28
GB
B27
GB
B26
GB
B25
GB
B24
GB
B23
GB
B22
GB
B21
GB
B20
GB
B19
GB
B18
GB
B17
GB
B16
GB
B15
GB
B14
TYPE
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0000
Table 6-3. Chip-Select Group B Base Address Register Description
Name Description
Setting
GBBx
Bits 15
–
1
Group B Base Address
—
These bits select
the high-order bits (28–14) of the starting
address for the chip-select range.
The chip-select base address must be set
according to the size of the corresponding
chip-select signals of the group.
Reserved
Bit 0
Reserved
This bit is reserved and should be set to 0.
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BIT
0
GB
C2
8
GB
C2
7
GB
C2
6
GB
C2
5
GB
C2
4
GB
C2
3
GB
C2
2
GB
C2
1
GB
C2
0
GB
C1
9
GB
C1
8
GB
C1
7
GB
C1
6
GB
C1
5
GB
C1
4
TYPE
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x0000
Table 6-4. Chip-Select Group C Base Address Register Description
Name Description
Setting
GBCx
Bits 15–1
Group C Base Address—These bits select
the high-order bits (28–14) of the starting
address for the chip-select range.
The chip-select base address must be set
according to the size of the corresponding
chip-select signals of the group.
Reserved
Bit 0
Reserved
This bit is reserved and should be set to 0.