Digi NS9215 - Manual (Page 105)

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W O R K I N G W I T H T H E C P U
DSP
www.digiembedded.com 105
Software emulation within the ARM-optimized JVM, which addresses the
remaining 20% of the Java byte codes.
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D S P
The ARM926EJ-S processor core provides enhanced DSP capability. Multiply
instructions are processed using a single cycle 32x16 implementation. There are
32x32, 32x16, and 16x16 multiply instructions, or Multiply Accumulate (MAC), and
the pipeline allows one multiply to start each cycle. Saturating arithmetic improves
efficiency by automatically selecting saturating behavior during execution, and is
used to set limits on signal processing calculations to minimize the effect of noise or
signal errors. All of these instructions are beneficial for algorithms that implement
the following:
GSM protocols
FFT
State space servo control
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M e m o r y M a n a g e m e n t U n i t ( M M U )
The MMU provides virtual memory features required by systems operating on
platforms such as WindowsCE or Linux. A single set of two-level page tables stored
in main memory control the address translation, permission checks, and memory
region attributes for both data and instruction accesses. The MMU uses a single,
unified Translation Lookaside Buffer (TLB) to cache the information held in the
page tables. TLB entries can be locked down to ensure that a memory access to a
given region never incurs the penalty of a page table walk.
MMU Features
Standard ARM926EJ-S architecture MMU mapping sizes, domains, and access
protection scheme.
Mapping sizes, as follows:
–
1 MB for sections
– 64 KB for large pages
– 4 KB for small pages
– 1 KB for tiny pages
Access permissions for large pages and small pages can be specified separately
for each quarter of the page (subpage permissions).
Hardware page table walks.