Digi NS9215 - Manual (Page 205)

. . . . .
M E M O R Y C O N T R O L L E R
Memory map
www.digiembedded.com 205
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M e m o r y m a p
The memory controller provides hardware support for booting from external
nonvolatile memory. During booting, the nonvolatile memory must be located at
address
0x00000000 in memory. When the system is booted, the SRAM or SDRAM
memory can be remapped to address 0x00000000 by modifying the address map in the
AHB decoder.
Power-on reset
memory map
On power-on reset, memory chip select 1 is mirrored onto memory chip select 0 and
chip select 4. Any transactions to memory chip select 0 or chip select 4 (or chip
select 1), then, access memory chip select 1. Clearing the address mirror bit (M) in
the Control register disables address mirroring, and memory chip select 0, chip
select 4, and memory chip select 1 can be accessed as normal.
Chip select 1
memory
configuration
You can configure the memory width and chip select polarity of static memory chip
select 1 by using selected input signals. This allows you to boot from chip select 1.
These are the bootstrap signals:
gpio_a[0], addr[23]: Memory width select
gpio_a[2]: Boot mode
Example: Boot
from flash, SRAM
mapped after boot
The system is set up as:
Chip select 1 is connected to the boot flash device.
Chip select 0 is connected to the SRAM to be remapped to 0x00000000 after boot.
This is the boot sequence:
1
At power-on, the reset chip select 1 is mirrored into chip select 0 (and chip
select 4).