Digi NS9215 - Manual (Page 17)

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Multicast Low Address Filter Register #6.......................................... 328
Multicast Low Address Filter Register #7.......................................... 328
Multicast High Address Filter Register #0 ......................................... 328
Multicast High Address Filter Register #1 ......................................... 328
Multicast High Address Filter Register #2 ......................................... 328
Multicast High Address Filter Register #3 ......................................... 328
Multicast High Address Filter Register #4 ......................................... 328
Multicast High Address Filter Register #5 ......................................... 328
Multicast High Address Filter Register #6 ......................................... 329
Multicast High Address Filter Register #7 ......................................... 329
Multicast Address Mask registers .......................................................... 329
Multicast Low Address Mask Register #0........................................... 329
Multicast Low Address Mask Register #1........................................... 329
Multicast Low Address Mask Register #2........................................... 329
Multicast Low Address Mask Register #3........................................... 329
Multicast Low Address Mask Register #4........................................... 330
Multicast Low Address Mask Register #5........................................... 330
Multicast Low Address Mask Register #6........................................... 330
Multicast Low Address Mask Register #7........................................... 330
Multicast High Address Mask Register #0 .......................................... 330
Multicast High Address Mask Register #1 .......................................... 330
Multicast High Address Mask Register #2 .......................................... 330
Multicast High Address Mask Register #3 .......................................... 330
Multicast High Address Mask Register #4 .......................................... 330
Multicast High Address Mask Register #5 .......................................... 331
Multicast High Address Mask Register #6 .......................................... 331
Multicast High Address Mask Register #7 .......................................... 331
Multicast Address Filter Enable register.................................................. 331
TX Buffer Descriptor RAM................................................................... 332
Offset+0 ................................................................................ 332
Offset+4 ................................................................................ 333
Offset+8 ................................................................................ 333
Offset+C ................................................................................ 333
RX FIFO RAM .................................................................................. 333
Sample hash table code..................................................................... 334
C h a p t e r 7 : E x t e r n a l D M A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 9
DMA transfers................................................................................. 339
Initiating DMA transfers .............................................................. 339
Processor-initiated.................................................................... 339
External peripheral-initiated........................................................ 339
DMA buffer descriptor....................................................................... 340
DMA buffer descriptor diagram ..................................................... 340
Source address [pointer]............................................................. 340