Digi NS9215 - Manual (Page 300)

E T H E R N E T C O M M U N I C A T I O N M O D U L E
Station Address registers
300 Hardware Reference NS9215
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S t a t i o n A d d r e s s r e g i s t e r s
Addresses: A060 0440 / 0444 / 0448
The 48-bit station address is loaded into Station Address Register #1, Station
Address Register #2, and Station Address Register #3, for use by the station address
logic (see “Station address logic (SAL)” on page 264).
Registers
D02 R NVALID 0 Read data not valid
When set to 1, indicates that the MII Management
read cycle has not completed and the read data is not
yet valid. Also indicates that SCAN READ is not
valid for automatic scan reads.
D01 R SCAN 0 Automatically scan for read data in progress
When set to 1, indicates that continuous MII
Management scanning read operations are in
progress.
D00 R BUSY 0 MII interface BUSY with read/write operation
When set to 1, indicates that the MII Management
module currently is performing an MII Management
read or write cycle. This bit returns to 0 when the
operation is complete.
Bits Access Mnemonic Reset Description
Reserved
OCTET1
13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30
OCTET2
Reserved
OCTET3
13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30
OCTET4