Ahb error monitoring configuration register – Digi NS9215 User Manual
Page 161
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S Y S T E M C O N T R O L M O D U L E
AHB Error Monitoring Configuration register
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161
Register bit
assignment
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A H B E r r o r M o n i t o r i n g C o n f i g u r a t i o n r e g i s t e r
Address: A090 0020
The AHB Error Monitoring Configuration register configures the AHB arbiter error
monitoring settings.
Bits
Access
Mnemonic
Reset
Description
D31:20
N/A
Reserved
N/A
N/A
D19
*
IE
Not reset
CPU instruction error
An error was found on the CPU instruction access to
external memory. The other fields in this register
and the AHB Error Status 1 register are not valid if
this bit is set.
D18
*
DE
Not reset
CPU data error
An error was found on the CPU data access to
external memory. The other fields in this register
and the AHB Error Status 1 register are not valid if
this field is set.
D17
*
ER
Not reset
AHB error response
Set if an AHB slave ERROR response is found.
D16:15
N/A
Reserved
N/A
N/A
D14
*
HWR
Not reset
hwrite
Transaction type: write or read.
D13:10
*
HMSTR
Not reset
hmaster[3:0]
Initiating master identifier.
D09:06
*
HPR
Not reset
hprot[3:0]
Transaction protection code.
D05:03
*
HSZ
Not reset
hsize[2:0]
Transaction size.
D02:00
*
HBRST
Not reset
hburst[2:0
Transaction burst type