Digi NS9215 - Manual (Page 42)

P I N O U T ( 2 6 5 )
General purpose I/O (GPIO)
42 Hardware Reference NS9215
C16 gpio[96] U I/O 2 0 PIC_0_BUS_1[0](I/O)
1 PIC_1_BUS_1[0](I/O)
2 PIC_0_CAN_RXD(I)(dup)
3 gpio[96]
B16 gpio[97] U I/O 2 0 PIC_0_BUS_1[1](I/O)
1 PIC_1_BUS_1[1](I/O)
2 PIC_0_CAN_TXD(O)(dup)
3 gpio97
D15 gpio[98] U I/O 2 0 PIC_0_BUS_1[2](I/O)
1 PIC_1_BUS_1[2](I/O)
2 PIC_1_CAN_RXD(I)(dup)
3 gpio[98]
E8 gpio[99] U I/O 2 0 PIC_0_BUS_1[3](I/O)
1 PIC_1_BUS_1[3](I/O)
2 PIC_1_CAN_TXD(O)(dup)
3 gpio[99]
D8 gpio[100] U I/O 2 0 PIC_0_BUS_1[4](I/O)
1 PIC_1_BUS_1[4](I/O)
2 PWM Ch 4
3 gpio[100]
C8 gpio[101] U I/O 2 0 PIC_0_BUS_1[5](I/O)
1 PIC_1_BUS_1[5](I/O)
2 Ext Int Ch 3 (dup)
3 gpio[101]
E6 gpio[102] U I/O 4 0 PIC_0_BUS_1[6](I/O)
1 PIC_1_BUS_1[6](I/O)
2 I 2 C SCL (dup)
3 gpio[102]
D5 gpio[103] U I/O 4 0 PIC_0_BUS_1[7](I/O)
1 PIC_1_BUS_1[7](I/O)
2 I 2 C SDA (dup)
3 gpio[103]
R12 gpio_a[0] U I/O 4 0 addr[24]
1 I 2 C SCL (dup)
2 Ext Int Ch 0 (dup)
3 gpio_a[0], Boot width[1]
U15 gpio_a[1] U I/O 4 0 addr[25]
1 I
2
C SDA (dup)
2 Ext Int Ch 1(dup)
3 Ext Int Ch 0]
Pin Signal U/D I/O OD Description