Digi NS9215 - Manual (Page 48)

P I N O U T ( 2 6 5 )
JTAG Test
48 Hardware Reference NS9215
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J T A G T e s t
Pin Signal U/D I/O OD Description
N14 tdi U I Test data in
N15 tdo O 2 Test data out
T17 tms U I Test mode select
R16 trst_n U I Test mode reset. For normal operation, this pin
is tied to ground or pulled down.
P15 tck I Test mode clock
P16 rtck O 2 Test mode return clock