Digi NS9215 - Manual (Page 351)

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E X T E R N A L D M A
DMA Status and Interrupt Enable register
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Register bit
assignment
Bit(s) Access Mnemonic Reset Description
D31 R/W1C NCIP 0 Normal completion interrupt pending
Set when a buffer descriptor has been closed. A
normal DMA channel completion occurs when the
BLEN count (D15:00) expires to zero and the L
but in the buffer descriptor is set or when the
peripheral device signals completion.
D30 R/W1C ECIP 0 Error completion interrupt pending
Set when the DMA channel encounters either a
bad buffer descriptor pointer or a bad data buffer
pointer. When the ECIP bit is set, the DMA
channel stops until the ECIP bit is cleared by
firmware. The DMA channel does not advance to
the next buffer descriptor.
When firmware clears the ECIP bit, the buffer
descriptor is retried from where it left off. The CA
bit in the DMA Control register can be used to
abort the current buffer descriptor and advance to
the next descriptor.
D29 R/W1C NRIP 0 Buffer not ready interrupt pending
Set when the DMA channel encounters a buffer
descriptor whose F bit is in the incorrect state. The
F bit must be set in order for the fetched buffer
descriptor to be considered valid. If the F bit is not
set, the descriptor is considered invalid and the
NRIP field is set.
When the NRIP bit is set, the DMA channel stops
until the field is cleared by firmware. The DMA
channel does not advance to the next buffer
descriptor.
D28 R/W1C CAIP 0 Channel abort interrupt pending
Set when the DMA channel detects the CA bit
(D30) set in the DMA Control register. When
CAIP is set, the DMA channel stops until the
CAIP bit is cleared by firmware. The DMA
channel automatically advances to the next buffer
descriptor after CAIP is cleared.
The CA bit in the DMA Control register must be
cleared, through firmware, before the CAIP bit is
cleared. Failure to reset the CA bit cause the next
buffer descriptor to abort also.
D27 R/W1C PCIP 0 Premature complete interrupt pending
Set when a DMA transfer is terminated by
assertion of the dma_done signal. NCIP is set
when PCIP is set for backwards compatibility.
D26:25 R/W Not used 0 This field must always be set to 0.