Wrapper configuration register – Digi NS9215 User Manual

Page 391

Advertising
background image

. . . . .

S E R I A L C O N T R O L M O D U L E : U A R T

Wrapper Configuration register

www.digiembedded.com

391

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

W r a p p e r C o n f i g u r a t i o n r e g i s t e r

Address: 9001_1000 / 9001_9000 / 9002_1000 / 9002_9000

This is the primary Wrapper Configuration register.

Register

Register bit
assignment

9001_1114

UART Line Status

9001_1118

UART Modem Status

9001_111C

UART Scratch

Address

Register

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

31

29

28

27

26

25

24

23

22

21

20

19

18

17

16

30

TXFLOW

Reserv

ed

RXCL

OSE

RXBYTES

RL

RS485OFF

RS485ON

DTREN

RXFL

USH

RXEN TXEN MODE

Reserved

RTSEN

TXFL

USH

Reserv

ed

RTS

Bits

Access

Mnemonic

Reset

Description

D31

N/A

Reserved

N/A

N/A

D30

R/W

RXEN

0

0

Disable wrapper function

1

Enable wrapper to process receive characters

D29

R/W

TXEN

0

0

Disable transmitter function

1

Enable wrapper to process transmit characters

D28

R/W

MODE

0

Selects either UART or HDLC mode. This bit applies
only to UART3.
0

UART mode

1

HDLC mode

D27:20

N/A

Reserved

N/A

N/A

D19

R/W

RTSEN

0

Indicates which signal is output: RTS or RS485
transceiver control.
0

RTS

1

RS485 transceiver control

D18

R/W

DTREN

0

Indicates which signal is output: DTR or TX baud clock.
0

DTR

1

TX baud clock

Advertising