Digi NS9215 - Manual (Page 264)

E T H E R N E T C O M M U N I C A T I O N M O D U L E
Station address logic (SAL)
264 Hardware Reference NS9215
PHY interface
mappings
This table shows how the different PHY interfaces are mapped to the external IO.
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S t a t i o n a d d r e s s l o g i c ( S A L )
The station address logic module examines the destination address field of incoming
frames, and filters the frames before they are stored in the Ethernet front-end
SAL Station address logic
Performs destination address filtering.
MII Media Independent Interface
Provides the interface from the MAC core to a PHY that supports the MII
(as described in the IEEE 802.3 standard).
Feature Description
External IO MII
RXD[3] RXD[3]
RXD[2] RXD[2]
RXD[1] RXD[1]
RXD[0] RXD[0]
RX_DV RX_DV
RX_ER RX_ER
RX_CLK RX_CLK
TXD[3] TXD[3]
TXD[2] TXD[2]
TXD[1] TXD[1]
TXD[0] TXD[0]
TX_EN TX_EN
TX_ER TX_ER
TX_CLK TX_CLK
CRS CRS
COL COL
MDC MDC
MDIO MDIO