Tx buffer descriptor pointer register – Digi NS9215 User Manual
Page 320
E T H E R N E T C O M M U N I C A T I O N M O D U L E
TX Buffer Descriptor Pointer register
320
Hardware Reference NS9215
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T X B u f f e r D e s c r i p t o r P o i n t e r r e g i s t e r
Address: A060 0A18
Register
Register bit
assignment
D16
R/W
EN_RXBR
0
Enable the RXBR interrupt bit.
D15:07
N/A
Reserved
N/A
N/A
D06
R/W
EN_STOVFL
0
Enable the STOVFL interrupt bit.
D05
R/W
Not used
0
Always write as 0.
D04
R/W
EN_TXBUFC
0
Enable the TXBUFC interrupt bit.
D03
R/W
EN_TXBUFNR
0
Enable the TXBUFNR interrupt bit.
D02
R/W
EN_TXDONE
0
Enable the TXDONE interrupt bit.
D01
R/W
EN_TXERR
0
Enable the TXERR interrupt bit.
D00
R/W
EN_TXIDLE
0
Enable the TXIDLE interrupt bit.
Bits
Access
Mnemonic
Reset
Description
Reserved
TXPTR
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Bits
Access
Mnemonic
Reset
Description
D31:08
N/A
Reserved
N/A
N/A
D07:00
R/W
TXPTR
0x00
Contains a pointer to the initial transmit buffer descriptor
in the TX buffer descriptor RAM.
Note:
This pointer is the 8-bit physical address of the
TX buffer descriptor RAM, and points to the
first location of the four-location buffer
descriptor. The byte offset of this buffer
descriptor can be calculated by multiplying this
value by 4.