Digi NS9215 - Manual (Page 247)

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M E M O R Y C O N T R O L L E R
Static Memory Extended Wait register
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S t a t i c M e m o r y E x t e n d e d W a i t r e g i s t e r
Address: A070 0080
The Static Memory Extended Wait register times long static memory read and write
transfers (which are longer than can be supported by the Static Memory Read Delay
registers or the Static Memory Write Delay registers) when the EW (extended wait)
bit in the related Static Memory Configuration register is enabled.
There is only one Static Memory Extended Wait register, which is used by the
relevant static memory chip select if the appropriate EW bit is set in the Static
Memory Configuration register.
It is recommended that this register be modified during system initialization, or
when there are no current or outstanding transactions. If necessary, however, these
control bits can be changed during normal operation.
Register
Register bit
assignment
Example Static memory read/write time = 16 μs
CLK frequency = 50 MHz
This value must be programmed into the Static Memory Extended Wait register:
(16 x 10 -6 x 50 x 10 6 / 16) - 1 = 49
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D y n a m i c M e m o r y C o n f i g u r a t i o n 0 – 3 r e g i s t e r s
Address: A070 0100 / 0120 / 0140 / 0160
13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30
Reserved
Reserved EXTW
Bits Access Mnemonic Description
D31:10 N/A Reserved N/A (do not modify)
D09:00 R/W EXTW External wait timeout
0x0
16 clock cycles, where the delay is in clk_out cycles
0x1-0x3FF
(n=1) x 16 clock cycles