Digi NS9215 - Manual (Page 404)

S E R I A L C O N T R O L M O D U L E : U A R T
Transmit Byte Count
404 Hardware Reference NS9215
Register
Register bit
assignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
T r a n s m i t B y t e C o u n t
Address: 9001_1034 / 9001_9034 / 9002_1034 / 9002_9034
Register
Register bit
assignment
13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30
Not used
Not used
EN
ABLE
Bits Access Mnemonic Reset Description
D31:01 R Not used 0 Write this field to 0.
D00 R/W ENABLE 0 Enable
Write a 1 to this field to enable ARM wakeup control
logic.
13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 16 30
Reserved
TXCOUNT
EN
ABLE TXCOUNT
Bits Access Mnemonic Reset Description
D31 R/W ENABLE 0 Enables and resets the transmit byte counter:
0
Transmit byte count disabled and reset
1 Transmit byte enabled
D30:24 N/A Reserved N/A N/A
D23:00 R TXCOUNT 0 This counter is incremented after bytes are transmitted.