Digi NS9215 - Manual (Page 143)

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S Y S T E M C O N T R O L M O D U L E
General purpose timers/counters
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G e n e r a l p u r p o s e t i m e r s / c o u n t e r s
Ten 32-bit general purpose timers/counters (GPTC) provide programmable time
intervals to the CPU when used as one or multiple timers. There are two I/O pins
associated with each timer.
When used as a gated timer, one I/O pin serves as an input qualifier (high/low
programmable).
When used as a regular timer (enabled by software), the other I/O pin serves
as a terminal count indicator output.
These pins can also be used independently as up/down counters to monitor the
frequency of certain events (events capturing). In this situation, the I/O pin
becomes the clock source of the counter.
Source clock
frequency
Depending on the applications, the source clock frequency of the timers/counters is
selectable among the system memory clock, the system memory clock with multiple
divisor options, or an external pulse event. The divisor options are 2, 4, 6, 16, 32, 62,
128, or 256. If an external pulse is used, the frequency must be less than one half the
system memory clock frequency.
GPTC
characteristics
Each GPTC can measure external event lengths up to minutes range, and can
be individually enabled/disabled.
Each GPTC can be configured to reload, with the value defined in the Initial
Timer Count register (one for each GPTC), and generates an interrupt upon
terminal count.
Each GPTC has an interrupt request connected to the IRQ interrupt controller
(VIC). The priority level and enable/disable of each interrupt can be
programmed in the VIC. The CPU can read the contents of the timer/counter.
GPTCs can be concatenated to form larger timer counters.
Control field
Include this control field in each of the 32-bit timer/counter control registers:
Clock frequency selection
Mode of operation:
–
Internal timer, with or without external terminal count indicator
– External gated timer with gate active low
– External gated timer with gate active high
– External event counter — frequency must be less than one half the system
memory clock frequency
Timer/counter enable
Count up or down