Register register bit assignment – Digi NS9215 User Manual
Page 287
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E T H E R N E T C O M M U N I C A T I O N M O D U L E
Ethernet Receive Status register
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287
Register
Register bit
assignment
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
RXCE
RXDV RXOK
RXBR
RXMC Rsvd
RXDR
Reserved
RXSIZE
Reserved
RXSHT
Bits
Access
Mnemonic
Reset
Description
D31:27
N/A
Reserved
N/A
N/A
D26:16
R
RXSIZE
0x000
Receive frame size in bytes
Length of the received frame, in bytes.
D15
R
RXCE
0x0
Receive carrier event previously seen
When set, indicates that a carrier event activity (an
activity on the receive channel that does not result in
a frame receive attempt being made) was found at
some point since the last receive statistics. A carrier
event results when the interface signals to the PHY
have the following values:
MRXER = 1
MRXDV = 0
RXD = 0xE
The event is being reported with this frame, although
it is not associated with the frame.
D14
R
RXDV
0x0
Receive data violation event previously seen
Set when the last receive event was not long enough
to be a valid frame.
D13
R
RXOK
0x0
Receive frame OK
Set when the frame has a valid CRC and no symbol
errors.
D12
R
RXBR
0x0
Receive broadcast frame
Set when the frame has a valid broadcast address.
D11
R
RXMC
0x0
Receive multicast frame
Set when the frame has a valid multicast address.
D10
N/A
Reserved
N/A
N/A
D09
R
RXDR
0x0
Receive frame has dribble bits
Set when an additional 1–7 bits are received after the
end of the frame.
D08:07
N/A
Reserved
N/A
N/A