Uart interrupt enable register – Digi NS9215 User Manual
Page 407
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S E R I A L C O N T R O L M O D U L E : U A R T
UART Interrupt Enable register
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407
Register
Register bit
assignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
U A R T I n t e r r u p t E n a b l e r e g i s t e r
Address: 9001_1104 / 9001_9104 / 9002_1104 / 9002_9104, DLAB = 0
The UART Interrupt Enable register selects the source of the interrupt from the
UART. Note that only bit ETBEI (bit 01) must be set for normal operation. All other
bits are for diagnostic purposes only.
Register
Register bit
assignment
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Reserved
BRDM
Bits
Access
Mnemonic
Reset
Description
D31:08
N/A
Reserved
N/A
N/A
D07:00
R/W
BRDM
0
Bits 15:08 of the baud rate generator divisor
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Reserved
EDSSI ELSI ETBEI ERBFI
Bits
Access
Mnemonic
Reset
Description
D31:04
N/A
Reserved
N/A
N/A
D03
R/W
EDSSI
N/A
Enables modem status interrupt
0
Disabled
1
Enabled