Memory bus configuration register, Gpio status register #3 – Digi NS9215 User Manual

Page 76

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I / O C O N T R O L M O D U L E

Memory Bus Configuration register

76

Hardware Reference NS9215

GPIO Status
Register #3

Address: A090_2088

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

M e m o r y B u s C o n f i g u r a t i o n r e g i s t e r

The Memory Bus Configuration register controls chip select and upper address
options.

Address: A090_208C

D23

R

GPIO87

Undefined

GPIO[87] status bit

D24

R

GPIO88

Undefined

GPIO[88] status bit

D25

R

GPIO89

Undefined

GPIO[89] status bit

D26

R

GPIO90

Undefined

GPIO[90] status bit

D27

R

GPIO91

Undefined

GPIO[91] status bit

D28

R

GPIO92

Undefined

GPIO[92] status bit

D29

R

GPIO93

Undefined

GPIO[93] status bit

D30

R

GPIO94

Undefined

GPIO[94] status bit

D31

R

GPIO95

Undefined

GPIO[95] status bit

Bit(s)

Access

Mnemonic

Reset

Description

Bit(s)

Access

Mnemonic

Reset

Description

D00

R

GPIO96

Undefined

GPIO[96] status bit

D01

R

GPIO97

Undefined

GPIO[97] status bit

D02

R

GPIO98

Undefined

GPIO[98] status bit

D03

R

GPIO99

Undefined

GPIO[99] status bit

D04

R

GPIO100

Undefined

GPIO[100] status bit

D05

R

GPIO101

Undefined

GPIO[101] status bit

D06

R

GPIO102

Undefined

GPIO[102] status bit

D07

R

GPIO103

Undefined

GPIO[103] status bit

D08

R

GPIO_A0

Undefined

GPIO_A[0] status bit

D09

R

GPIO_A1

Undefined

GPIO_A[1] status bit

D10

R

GPIO_A2

Undefined

GPIO_A[2] status bit

D11

R

GPIO_A3

Undefined

GPIO_A[3] status bit

D31:12

N/A

Reserved

N/A

N/A

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