Digi NS9215 - Manual (Page 11)

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AHB Error Detect Status 2 .................................................................. 160
AHB Error Monitoring Configuration register ............................................ 161
Timer Master Control register ............................................................. 162
Timer 0–4 Control registers................................................................. 164
Timer 5 Control register .................................................................... 166
Timer 6–9 Control registers................................................................. 168
Timer 6–9 High registers .................................................................... 170
Timer 6–9 Low registers..................................................................... 171
Timer 6–9 High and Low Step registers ................................................... 172
Timer 6–9 Reload Step registers ........................................................... 172
Timer 0-9 Reload Count and Compare register ......................................... 173
Timer 0-9 Read and Capture register ..................................................... 174
Interrupt Vector Address Register Level 31–0 ........................................... 175
Int (Interrupt) Config (Configuration) 31–0 registers ................................... 175
Individual register mapping ......................................................... 175
ISADDR register............................................................................... 176
Interrupt Status Active...................................................................... 177
Interrupt Status Raw ........................................................................ 178
Software Watchdog Configuration ........................................................ 178
Software Watchdog Timer .................................................................. 179
Clock Configuration register ............................................................... 180
Module Reset register ....................................................................... 182
Miscellaneous System Configuration and Status register .............................. 184
PLL Configuration register.................................................................. 186
PLL frequency formula ............................................................... 186
Active Interrupt Level ID Status register ................................................. 187
Power Management.......................................................................... 187
AHB Bus Activity Status ..................................................................... 190
System Memory Chip Select 0 Dynamic Memory Base and Mask registers........... 190
System Memory Chip Select 1 Dynamic Memory Base and Mask registers........... 191
System Memory Chip Select 2 Dynamic Memory Base and Mask registers........... 192
System Memory Chip Select 3 Dynamic Memory Base and Mask registers........... 193
System Memory Chip Select 0 Static Memory Base and Mask registers .............. 194
System Memory Chip Select 1 Static Memory Base and Mask registers .............. 195
System Memory Chip Select 2 Static Memory Base and Mask registers .............. 196
System Memory Chip Select 3 Static Memory Base and Mask registers .............. 197
Gen ID register ............................................................................... 198
External Interrupt 0–3 Control register................................................... 199
RTC Module Control register ............................................................... 200
C h a p t e r 5 : M e m o r y C o n t r o l l e r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 3
Features ................................................................................ 203
Low-power operation........................................................................ 204
Low-power SDRAM deep-sleep mode............................................... 204