Interrupt enable status register – Digi NS9215 User Manual

Page 470

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R E A L T I M E C L O C K M O D U L E

Interrupt Enable Status register

470

Hardware Reference NS9215

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I n t e r r u p t E n a b l e S t a t u s r e g i s t e r

Address: 9006 0028

The Interrupt Enable Status register determines which interrupt sources are enabled
and which interrupt sources are disabled.

Register

Register bit
assignment

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

31

29

28

27

26

25

24

23

22

21

20

19

18

17

16

30

Reserved

Reserved

Mnth

Stat

Date

Stat

Hour

Stat

Min

Stat

Sec

Stat

Hsec

Stat

Alrm

Stat

Bits

Access

Mnemonic

Reset

Description

D31:07

N/A

Reserved

N/A

N/A

D06

R

Alrm Stat

1

Alarm interrupt status

0

Interrupt enabled

1

Interrupt disabled

D05

R

Mnth Stat

1

Month interrupt status

0

Interrupt enabled

1

Interrupt disabled

D04

R

Date Stat

1

Date interrupt status

0

Interrupt enabled

1

Interrupt disabled

D03

R

Hour Stat

1

Hour interrupt status

0

Interrupt enabled

1

Interrupt disabled

D02

R

Min Stat

1

Minute interrupt status

0

Interrupt enabled

1

Interrupt disabled

D01

R

Sec Stat

1

Second interrupt status

0

Interrupt enabled

1

Interrupt disabled

D00

R

Hsec Stat

1

Hundredth of a second interrupt status

0

Interrupt enabled

1

Interrupt disabled

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