Rockwell Automation 1398-DDM-xxx ULTRA 100 Series Drives Installation Manual - Manual (Page 90)

Publication 1398-5.2 – PDF 1997
6-26 Interfaces
Figure 6.31 Single-Ended Encoder Interface via Open Collector Transistor
with 24 VDC Pull-up (not recommended)
Table 6.21: Step/Direction and CW/CCW (Step Up/Step Down)
Interface Specifications
Specification Description Minimum Maximum
Signal frequency Frequency of the input signal. 1 MHz
Pulse Width Time interval the step (CW/CCW) signal must
remain in a single state for detection. 500 nsec
Setup Time Time interval the direction (CW/CCW) signal
must be stable before the corresponding step
(CCW/CW) signal changes state. 500 nsec
The following diagram shows the relationship between STEP and DIRECTION inputs.
twisted pair
twisted pair
Ch A
ENCODER
AX+
AX-
14
J1 Drive
BX+
BX-
16
Drive Chassis Encoder Case
Ch B
24VDC
24VDC
4
2
Supply
Return
ECOM
IX+
IX-
18
Ch I
24VDC
IN751
5.1 V
IN751
5.1 V
IN751
5.1 V
STEP
INPUT
DIRECTION
INPUT
Direction data must be
steady for this time period.
500 nsec
minimum
500 nsec
minimum
500 nsec in either
high or low state
500 nsec
minimum
500 nsec
minimum