Single-cycle memory read target transactions – Altera PCI Compiler User Manual

Page 124

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3–50

User Guide Version 11.1

Altera Corporation

PCI Compiler

October 2011

Target Mode Operation

Single-cycle Memory Read Target Transactions

Figure 3–7

shows the waveform for a 64-bit single-cycle memory read

target transaction. The 64-bit extension signals are not applicable to the
pci_mt32

and pci_t32 MegaCore functions.

Figure 3–7. Single-Cycle Memory Read Target Transaction

Note

Figure 3–7

:

(1)

This signal is not applicable to the pci_mt32 or pci_t32 MegaCore functions.

ad[31..0]

(1) ad[63..32]

cben[3..0]

(1) cben[7..4]

par

(1) par64

framen

(1) req64n

irdyn

devseln

(1) ack64n

trdyn

stopn

lt_framen

l_adro[31..0]

l_cmdo[3..0]

lt_ackn

l_adi[31..0]

lt_dxfrn

clk

(1) l_adi[63..32]

l_beno[3..0]

(1) l_beno[7..4]

lt_tsr[11..0]

Adr

6

Adr-PAR

Z

Adr

6

Z

BE0_L

BE0_H

Z

000

181

D0_L

D0_H

D0-L-PAR

D0-H-PAR

000

581

1

2

3

4

5

6

7

8

9

10

D0_L

D0_H

lt_rdyn

BE0_L

BE0_H

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