Altera PCI Compiler - Manual (Page 175)

Altera Corporation User Guide Version 11.1 3–101
October 2011
Functional Description
The local side deasserts lm_rdyn in clock cycle 9. Consequently, on the
following clock cycle (clock cycle 10), the pci_mt64 function suspends
data transfer on the local side by deasserting the lm_dxfrn signal and on
the PCI side by deasserting the irdyn signal.
Figures 3–34 shows the same transaction as in Figure 3–31 with the PCI
bus target inserting a wait state. This figure applies to both pci_mt64
and pci_mt32 MegaCore functions, excluding the 64-bit extension
signals as noted for pci_mt32. The PCI side inserts a wait state by
deasserting trdyn in clock cycle 9. Consequently, on the following clock
cycle (clock cycle 10), the function deasserts the lm_ackn and lm_dxfrn
signal on the local side. Data transfer is suspended on the PCI side in
clock cycle 9 and on the local side in clock cycle 10.