Altera PCI Compiler - Manual (Page 36)

1–2 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI MegaCore Function Design Walkthrough
After you have purchased a license for the PCI Compiler, the design flow
involves the following additional steps:
1. Set up licensing.
2. Generate a programming file for the Altera device(s) on your board.
3. Program the Altera device(s) with the completed design.
4. Perform design verification.
PCI MegaCore
Function Design
Walkthrough This walkthrough explains how to create a custom variation of a PCI
MegaCore function using the Altera PCI IP Toolbench and the Quartus II
software. When you finish generating a custom variation of the PCI
MegaCore function, you can incorporate it into your overall project.
This walkthrough explains how to create a custom variation of the
pci_mt64
MegaCore function in Verilog HDL. You can also use these
procedures for the pci_mt32, pci_t32 and pci_t64 MegaCore
functions, and substitute VHDL for Verilog HDL.
Altera recommends that you use the pci_mt32 MegaCore function for
32-bit applications. The pci_mt64 MegaCore function has additional
logic and I/O pins which are wasted if used in a 32-bit mode applications.
1 You can interface the pci_mt64 MegaCore function with 32-bit
agents on the bus. To operate in 32-bit mode only, connect an
input pin to the l_dis_64_extn signal. This signal disables the
64-bit extension signals if driven low.
This walkthrough consists of these steps:
■ Create a New Quartus II Project
■ Launch IP Toolbench
■ Step 1: Parameterize
■ Step 2: Set Up Simulation
■ Step 3: Generate
Create a New Quartus II Project
You need to create a new Quartus II project with the New Project Wizard,
which specifies the working directory for the project, assigns the project
name, and designates the name of the top-level design entity.