Altera PCI Compiler - Manual (Page 247)

Altera Corporation User Guide Version 11.1 5–13
October 2011 PCI Compiler
Getting Started
■ Configuration read operations on command registers BAR0 and
BAR1 of the Altera PCI MegaCore function, followed by
configuration read operations on BAR0 and BAR1 of the PCI
testbench trgt_tranx.
You can view the following PCI transactions in the ModelSim
Wave - Default
window if you made the additions to the mstr_tranx
file.
■ A 32-bit burst memory write operation to the on-chip memory.
■ A 32-bit burst memory read operation to the on-chip memory.
■ Configure DMA to perform burst memory read transaction to move
data from the PCI testbench trgt_tranx to on-chip memory.
■ Configure DMA to perform burst memory write transaction to move
data from the on-chip memory to PCI testbench trgt_tranx.
Compile the
Design Compile your design in the Quartus II software. Refer to Quartus II Help
for instructions on performing compilation.
Altera provides constraint files to ensure that the PCI MegaCore function
achieves PCI specification timing requirements in Altera devices. This
walkthrough incorporates a constraint file included with PCI Compiler.
f
For more information on using Altera-provided constraint files in your
design, refer to
Appendix A, Using PCI Constraint File Tcl Scripts .
For this walkthrough perform the following steps:
1. Open c:\sopc_pci\chip_top.qpf (the chip_top project) in the
Quartus II software.
1
This is the same project you created in “PCI Compiler with
SOPC Builder Flow Design Walkthrough” on page 5–2 .
2. Choose Utility Windows > Tcl Console (View menu).
3. Source the generated constraint file by typing the following
commands at the Quartus II Tcl Console command prompt:
source pci_constraints_for_pci_compiler.tcl
r
add_pci_constraints -pin_suffix _pci_compiler
r