Altera PCI Compiler - Manual (Page 246)

5–12 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI Compiler with SOPC Builder Flow Design Walkthrough
You can also copy the mstr_tranx.v file from the SOPC Builder example
directory located at <path>/pci_compiler/sopc_flow_examples/verilog/
pci_sim/verilog/mt32
.
f
For more information on the PCI testbench files refer to Chapter 8,
Testbench .
For this walkthrough, perform the following steps:
1. Start the ModelSim simulator.
2. In the simulator, change your working directory to
c:\sopc_pci\chip_top_sim
.
3. To run the script, type the following command at the simulator
command prompt:
source setup_sim.do
r
4. To compile all the files and load the design, type the following
command at the simulator prompt:
s
r
5. To see all the signals in the wave-default window, type the
following command at the simulator prompt:
w
r
1
Not all of the signals show up in the Wave - Default
window. You need to explicitly add other signals of interest
to the Wave - Default window.
6. To simulate the design, type the following command at the
simulator prompt:
run 10000ns
r
View the following PCI transactions in the ModelSim Wave - Default
window:
■ Configuration write operations on the command registers BAR0 and
BAR1 of the Altera PCI MegaCore function, followed by
configuration write operations on BAR0 and BAR1 of the PCI
testbench target device (trgt_tranx).