Altera PCI Compiler - Manual (Page 40)

1–6 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI MegaCore Function Design Walkthrough
4. Click Next to open the Base Address Registers (BARs) page. This
page allows you to configure the PCI base address registers (BARs)
that define the address ranges of Memory and I/O write and read
requests that your application will claim for the PCI interface.
For this walkthrough, specify these settings:
a. Ensure that Implement Only 32 Bit BARs is selected under
32/64 Bit BARs
.
b. Click BAR0 = 1 MBytes (Memory).
c. A window showing default settings for BAR0 displays. For this
walkthrough, use the default sliding pointer setting so that
BAR0
reserves 1 MByte (0xFFF00000) of memory.
d. Click OK.
e. Click BAR1 .
f. A window showing the default settings for BAR1 displays.
Turn on Enable.
g. Select I/O for the type of memory reserved.
h. Move the sliding pointer so that BAR1 reserves 64 Bytes
(0xFFFFFFC1) of I/O memory.
i. Click OK.
j. Select BAR2 Unused: Click to Configure.
k. A window showing default settings of BAR2 displays. Turn on
Enable
.
l. Move the sliding pointer so that BAR2 reserves 1 MByte
(0xFFF00000) of memory.
m. Click OK.
5. Click Next to open the Advanced PCI MegaCore Features page. For
this walkthrough, use the default settings for all options on this
page.
6. Click Finish to complete the parameterization of your pci_mt64
MegaCore function variation.