Altera PCI Compiler - Manual (Page 147)

Altera Corporation User Guide Version 11.1 3–73
October 2011
Functional Description
Figure 3–20 shows a 32-bit burst memory write transaction; the events are
the same for Figure 3–17 . The main difference between the two figures is
that in Figure 3–20 l_ldat_ackn and l_hdat_ackn toggle to indicate
which DWORD is valid on the local side. In Figure 3–20 , the high DWORD is
transferred first because the address used is not a QWORD boundary. The
l_hdat_ackn
signal is asserted during clock cycle 6 and continues to be
asserted until the first DWORD is transferred on the local side during clock
cycle 7. The local side is informed that the pending transaction is a 32-bit
burst because lt_tsr[7] is not asserted and lt_tsr[9] is asserted. If
the local side cannot handle 32-bit burst transactions, it can disconnect
after the first local transfer.
Figure 3–20 only applies to the pci_mt64 and pci_t64 functions. For
the pci_mt32 and pci_t32 functions, Figure 3–17 reflects the
waveforms for a 32-bit burst memory write transaction, excluding the
64-bit extension signals as noted.