Simulate the design, Simulate the design –9 – Altera PCI Compiler User Manual

Page 43

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Altera Corporation

User Guide Version 11.1

1–9

October 2011

PCI Compiler

Getting Started

2.

After you review the generation report, click Exit to close IP
Toolbench.

1

If you generate the MegaCore function instance in a Quartus II
project, you are prompted to add the Quartus II IP File (.qip)
files to the current Quartus II project. The .qip file is generated
by the MegaWizard interface, and contains information about
the generated IP core. In most cases, the .qip file contains all of
the necessary assignments and information required to process
the MegaCore function or system in the Quartus II compiler. The
MegaWizard interface generates a single .qip file for each
MegaCore function.

You can now integrate your PCI MegaCore function variation into your
design and compile.

Simulate the
Design

To simulate your design, you use the IP functional simulation models
generated by IP Toolbench in conjunction with the Altera-provided
PCI testbench. The IP functional simulation model is the .vo or .vho file
generated as specified in

“Step 2: Set Up Simulation” on page 1–7

. These

files are generated in the directory you specified in the MegaWizard Plug-
In Manager. Compile this IP functional simulation model in your
simulation environment as instructed below to perform functional
simulation of your PCI MegaCore function variation.

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