Figure 3–2. pci_mt32 functional block diagram – Altera PCI Compiler User Manual
Page 77
Advertising
Altera Corporation
User Guide Version 11.1
3–3
October 2011
Functional Description
Figure 3–2. pci_mt32 Functional Block Diagram
PCI Address/
Data Buffer
Parity Checker &
Generator
cache[7..0]
par
perrn
serrn
framen
irdyn
trdyn
devseln
stopn
gntn
reqn
intan
ad[31..0]
cben[3..0]
clk
rstn
idsel
pci_mt32
l_dato[31..0]
l_adro[31..0]
l_beno[3..0]
l_cmdo[3..0]
lt_rdyn
lt_discn
lt_abortn
lirqn
lt_framen
lt_ackn
lt_dxfrn
lt_tsr[11..0]
l_adi[31..0]
l_cbeni[3..0]
lm_req32n
lm_lastn
lm_rdyn
lm_adr_ackn
lm_tsr[9..0]
cmd_reg[6..0]
stat_reg[6..0]
lm_dxfrn
Local Target
Control
Local Address/
Data/Command/
Byte Enable
Local Master
Control
PCI Target
Control
PCI Master
Control
Parameterized
Configuration
Registers
lm_ackn
Advertising