Avalon configuration, Avalon configuration –16, Table 6–1 – Altera PCI Compiler User Manual

Page 266

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6–16

User Guide Version 11.1

Altera Corporation

PCI Compiler

October 2011

Avalon Configuration

In some cases, you should try to adjust the Base Address of some
peripherals to help reduce the amount of address space you reserve with
the PCI BAR. In

Table 6–1

the only difference between Example B and

Example C is the location of the second peripheral. In Example B the BAR
size is 16 MBytes, while in Example C the size is 64 KBytes.

Avalon
Configuration

The Avalon Configuration tab of the PCI Compiler wizard is used to
configure the address mapping from Avalon-MM addresses to PCI
addresses. This map can be dynamically configured at run time or
hardwired. If you choose to hardwire the map, the controls on this page
are used to define the hardwired map.

1

If you select the PCI Target-Only Peripheral mode from the
System Options - 1

tab, all options on the Avalon

Configuration

tab, except Avalon CRA Port, will be disabled.

Under Address Translation Table Configuration, selecting either
Dynamic Translation Table

or Fixed Translation Table options

determines the maximum number of pages for the window from Avalon
to PCI. If you select Fixed Translation Table, the number of pages is
limited to 16. The maximum number of pages for a dynamically
configured address map is 512.

In the Address Translation Table Size field, you set the number and size
of address pages. The lower limit on the size of the pages is 4 KBytes and
the upper limit is 2 GBytes. The maximum number of pages is limited by
either the decision to hardwire the map or the size of the page. The
maximum number of pages is the smaller of:

Table 6–1. Determining the Size and Avalon Base Address of a BAR

Example

Avalon Peripheral

Setting

Calculations

PCI BAR Setting

A

End1 = 0x0001_FFFF
Base1 = 0x0001_0000

W = 16
Size = 2

(32-16)

= 2

16

= 64K

Base = 0x0001_0000

BAR size = 64 KBytes – 16 bits
Avalon Base Address = 0x0001_0000

B

End2 = 0x0A80_0FFF
Base2 = 0x0A80_0000

End 1 = 0x0A00_7FFF
Base1 = 0x0A00_4000

W = 8
Size = 2

24

= 16 MBytes

Base = 0x0A00_4000

BAR Size = 16 MBytes – 24 bits
Avalon Base Address = 0x0A00_0000

C

End2 = 0x0A00_8FFF
Base2 = 0x0A00_8000

End 1 = 0x0A00_7FFF
Base1 = 0x0A00_4000

W = 16
Size = 2

16

= 64 KBytes

Base = 0x0A00_4000

BAR Size = 64 KBytes – 16 bits
Avalon Base Address = 0x0A00_0000

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