Altera PCI Compiler User Manual

Page 172

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3–98

User Guide Version 11.1

Altera Corporation

PCI Compiler

October 2011

Master Mode Operation

10

Because

lm_lastn

was asserted and a data phase was completed in the previous cycle,

framen

and

req64n

are deasserted, while

irdyn

and

trdyn

are asserted. This action indicates that the

last data phase is completed on the PCI side on the rising edge of clock cycle 11.

On the local side, the function continues to assert

lm_ackn

, informing the local side that the function

has registered data from the PCI side on the previous cycle and is ready to send the data to the local
side master interface. Because

lm_rdyn

was asserted in the previous cycle and

lm_ackn

is

asserted in the current cycle, the function asserts

lm_dxfrn

. The assertion of the

lm_dxfrn

,

l_ldat_ackn

, and

l_hdat_ackn

signals indicate to the local side that another valid data is

available on the

l_dato

bus. The local side has now received two valid 64-bit data.

The function continues to assert

lm_tsr[8]

informing the local side that a successful data transfer

has occurred on the PCI bus during the previous clock cycle.

11

On the PCI side,

irdyn

,

devseln

,

ack64n

, and

trdyn

are deasserted, indicating that the current

transaction on the PCI side is completed. There will be no more PCI data phases.

On the local side, the function continues to assert

lm_ackn

, informing the local side that the function

has registered data from the PCI side on the previous cycle and is ready to send the data to the local-
side master interface. Because

lm_rdyn

was asserted in the previous cycle and

lm_ackn

is

asserted in the current cycle, the function asserts

lm_dxfrn

. The assertion of the

lm_dxfrn

,

l_ldat_ackn

, and

l_hdat_ackn

signals indicate to the local side that data on the

l_dato

bus

is valid. The local side has now received three 64-bit words of data.

Because the local side has received all the data that was registered from the PCI side, the local side
can now deassert

lm_rdyn

. Otherwise, if there is still some data that has not been transferred from

the PCI side to the local side,

lm_rdyn

must continue to be asserted.

The function continues to assert

lm_tsr[8]

informing the local side that a successful data transfer

has occurred on the PCI bus during the previous clock cycle.

12

The function deasserts

lm_tsr

[3]

, informing the local side that the data transfer mode is

completed. Therefore,

lm_ackn

and

lm_dxfrn

are also deasserted.

Table 3–38. Zero-Wait State Burst Memory Read Master Transaction (Part 3 of 3)

Clock
Cycle

Event

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