Altera PCI Compiler - Manual (Page 146)

3–72 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
Target Mode Operation
In Figure 3–19 , the local-side transfer occurs in clock cycle 7 because
lt_dxfrn is asserted during that clock cycle. At the same time,
l_ldat_ackn is asserted to indicate that the low DWORD is valid. This
event occurs because the address used in the example is at QWORD
boundary.
Figure 3–19. 32-Bit PCI & 64-Bit Local-Side Single-Cycle Memory Write Target Transaction
Note to Figure 3–19 :
(1) Ignore this signal for this transaction.
ad[31..0]
cben[3..0]
par
framen
req64n
irdyn
devseln
ack64n
trdyn
stopn
lt_framen
l_adro[31..0]
l_cmdo[3..0]
lt_rdyn
lt_ackn
l_dato[31..0]
lt_dxfrn
l_ldat_ackn
l_hdat_ackn
clk
(1) l_dato[63..32]
l_beno[3..0]
(1) l_beno[7..4]
lt_tsr[11..0]
Adr
7
Adr-PAR
Adr
7
BE0_L
000 101
D0_L
D0_L
D0-L-PAR
BE0_L
000
1 2 3 4 5 6 7 8 9 10 11
501
Adr