Altera PCI Compiler - Manual (Page 42)

1–8 User Guide Version 11.1 Altera Corporation
PCI Compiler October 2011
PCI MegaCore Function Design Walkthrough
To generate your MegaCore function, follow these steps:
1. Click Step 3: Generate in IP Toolbench. A summary of files
generated to your project directory is displayed.
Table 1–1 describes the generated files and other files that may be in
your project directory. The names and types of files specified in the
IP Toolbench report vary based on whether you created your design
with VHDL or Verilog HDL.
Table 1–1. IP Toolbench-Generated Files
Extension Description
<variation name>.v or .vhd A MegaCore function variation file that defines a VHDL or Verilog HDL
top-level description of the custom MegaCore function. Instantiate the
entity defined by this file inside of your design. Include this file when
compiling your design in the Quartus II software.
<variation name>_bb.v A Verilog HDL black box file for the MegaCore function variation. Use this
file when using a third-party EDA tool to synthesize your design.
<variation name>.bsf A Quartus II symbol file for the MegaCore function variation. You can use
this file in the Quartus II block diagram editor.
<variation name>.qip Contains Quartus II project information for your MegaCore function
variations.
<variation name>_syn.v A timing and resource estimation netlist for use in some third-party
synthesis tools. This file is generated when the option Generate netlist on
the EDA page is turned on.
<variation name>.ppf This XML file describes the MegaCore pin attributes to the Quartus II Pin
Planner. MegaCore pin attributes include pin direction, location, I/O
standard assignments, and drive strength. If you launch IP Toolbench
outside of the Pin Planner application, you must explicitly load this file to
use Pin Planner.
<variation name>.vo or .vho A Verilog HDL or VHDL IP functional simulation model.
pci_constraints_for_<variation
name>.tcl A tcl script for assigning timing constraints to the MegaCore function.
<variation name>_nativelink.tcl A tcl script for assigning NativeLink simulation testbench settings to the
Quartus project.
<variation name>.html A MegaCore function report file.